* Circuit Extracted by Tanner Research's L-Edit V7.12 / Extract V4.00 ; * TDB File: C:\Documents and Settings\akader1\Desktop\dam, Cell: inverter * Extract Definition File: C:\Documents and Settings\All Users\Desktop\stu712\mosis\morbn20.ext * Extract Date and Time: 10/17/2005 - 16:10 .control destroy all echo TRAN 0.001m 2m plot output+6 input .endc .MODEL MNMOSIS NMOS LEVEL=2 LD=0.250000U TOX=418.000008E-10 + NSUB=9.236187E+14 VTO=0.858153 KP=5.048000E-05 GAMMA=0.198 + PHI=0.6 UO=596.729 UEXP=7.029586E-02 UCRIT=10266.7 + DELTA=2.7371 VMAX=65701.4 XJ=0.250000U LAMBDA=1.843384E-02 + NFS=1.086360E+12 NEFF=1 NSS=1.000000E+10 TPG=1.000000 + RSH=28.760000 CGDO=3.097916E-10 CGSO=3.097916E-10 CGBO=3.838441E-10 + CJ=8.997900E-05 MJ=0.783638 CJSW=5.524800E-10 MJSW=0.285064 PB=0.800000 .MODEL MPMOSIS PMOS LEVEL=2 LD=0.250000U TOX=418.000008E-10 + NSUB=9.309300E+15 VTO=-0.889271 KP=1.908000E-05 GAMMA=0.6289 + PHI=0.6 UO=216.28 UEXP=0.218144 UCRIT=62664 + DELTA=0.164572 VMAX=100000 XJ=0.250000U LAMBDA=5.011626E-02 + NFS=9.266623E+11 NEFF=1.001 NSS=1.000000E+10 TPG=-1.000000 + RSH=66.820000 CGDO=3.097916E-10 CGSO=3.097916E-10 CGBO=3.727276E-10 + CJ=2.981300E-04 MJ=0.556944 CJSW=3.002100E-10 MJSW=0.243045 PB=0.800000 * WARNING: Layers with Unassigned AREA Capacitance. * * * *

* *

* WARNING: Layers with Unassigned FRINGE Capacitance. * * * * *

* *

* * WARNING: Layers with Zero Resistance. * * * * VVin Vdd 0 DC 5 Vinput input 0 PULSE(0 5 0 0 0 0.0005 .001) M1 output input Vdd Vdd MPMOSIS L=2u W=6u AD=42p PD=26u AS=36p PS=24u * M1 DRAIN GATE SOURCE BULK (41 29 43 35) M2 output input 0 0 MNMOSIS L=2u W=3u AD=39p PD=26u AS=33p PS=24u * M2 DRAIN GATE SOURCE BULK (41 11 43 14) * Pins of element D3 are shorted: * D3 Vdd Vdd D_lateral AREA=6p * D3 PLUS MINUS (34 29 35 35) * Pins of element D4 are shorted: * D4 0 0 D_lateral AREA=6p * D4 PLUS MINUS (35 10 36 16) * Total Nodes: 4 * Total Elements: 4 * Extract Elapsed Time: 0 seconds .END