Warning: include(/srv/Secure/homepage/../users/06/adem/access.php): failed to open stream: No such file or directory in /srv/users/06/adem/engin/engin.php on line 2

Warning: include(): Failed opening '/srv/Secure/homepage/../users/06/adem/access.php' for inclusion (include_path='.:/usr/share/php:/usr/share/pear') in /srv/users/06/adem/engin/engin.php on line 2
E25 : princpiles of computer architecture
why not!
E25 : COMPUTER ARCHITECTURE
in partnership with mustafa paksoy
spring 2005 - bruce maxwell
engin@swat:    physical systems analysis   .   digital systems   .   computer architecture   .   computer graphics   .   control theory   .   mobile robotics   .   VLSI Design   .   Electronics


Lab 1: Introduction to Digital Logic & VHDL
In this lab we wrote a very basic circuit in VHDL that can operate based on instructions stored in memory and display output on a set of 8 LEDs. In its 16 line by 22 bit ROM we wrote a simple program that rotates the LEDs around a 7 segment display and loaded into an Altera board, watched it in action.

ENGR 025. Principles of Computer Architecture : This course covers the physical and logical design of a computer. Topics include current microprocessors, CPU design, RISC and CISC concepts, pipelining, superscalar processing, cache, paging, segmentation, virtual memory, parallel architectures, bus protocols, and input/output devices. Labs cover analysis of current systems and microprocessor design using CAD tools, including VHDL.

Lab 2: The Memory Hierarchy and Computer Performance
For this lab we tested the performances of 5 different processors (p3, p4, g4, g5, UltraSparcII) on various tasks and observed some properties (ie, endianness, how they create random numbers) In particular, we observed the effects of cache and superscalar processing on system performance.
Lab 3: Build Your Own Computer
In this lab we designed a simple CPU based on Von Neuman's IAS computer. The major difference of our computer is that it uses seperate memories for instructions and data. Also, our computer does not have an IBR (Instruction Buffer Register) and it has 2-bit register for flags that are useful with conditional jumps and ALU operations. In order to implement our computer, we first developed a state machine that outlined our Fetch-Decode-Execute states. Then we coded it up in VHDL and finally, we implemented the design on an ALTERA board. As an extension we wrote an assembler for our computer.
Lab 4: Real-time Video Processing Using MMX
For this lab, we wrote video processing routines that modify a 8-bit grayscale image feed on the fly. We implemented 5 different algorithms both in plain C and in in-line assembly using MMX SIMD capabilities. We compared the performances of using plain C and using MMX instructions. As expected MMX algorithms performed better, yet the performance difference was not reflected on frame rate. However, a significant performance improment was observable once we started clocking the filters themselves.
Final Lab: OISC
In this lab, we designed and implemented a One Instruction Set Computer. The instruction we used was "SUBLEQ A B C" which means "subtract the value in M(A) from M(B) and store it in M(B), if the result is not positive, go to instruction C". In order to be able to store values, we also added a flag that allows us to save immediate values to a given location in memory. In order to implement our computer, we first developed a state machine, then we coded it up in VHDL and tested it on an Altera board. In addition we implemented an assembler and a virtual OISC machine.

Fatal error: Call to undefined function visitor() in /srv/users/06/adem/engin/e25/index.php on line 82