One problem we encountered came up during the cache structure tests. During the first two cache tests which were supposed to be nice, we were writing the entire block of memory to the cache. The problem was that, because of processors' write-through policies, the data was being written directly to main memory. This caused the tests to run for much longer than they should have. We solved this problem by having the cache read from the memory block as it was modified. This correction caused the tests to run at speeds which were consistent with the facts we knew about the cache structure and our other data.
Another problem we encountered was that our mean cache testing program was not running nearly as slow as we had hoped. In fact, the mean program was running almost as fast as our two baselines, especially on the P3. We set out testing this, and soon discovered that L2 cache was helping the mean program out. Our block of memory was within the size of the L2 cache and so all the data was in L2. So, when reading, the processor never had to go all the way to main memory to get the data. This significantly sped up the speed of the mean program. However, when we increased the excess memory by a factor of four, this forced the processor to go all the way to memory for every read. The program then exhibited the expected speed decrease.
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